"Epitaxial Nanostructured GaAs on Si for Next Generation Electronics"
III-V semiconductor materials present higher carrier mobility than Si and a band gap that can be engineered for different applications. The heterogeneous integration of III-V materials on a main Si CMOS platform offers tremendous prospects for future high speed and low power logic applications. In addition, it provides an economical alternative route to the development of large III-V substrates. However, the heterogeneous integration generates immense scientific and technological challenges that must be addressed.
This project mainly aims at investigating and improving the structural and electrical properties of high-k/III-V devices fabricated using III-V materials grown on Si. One of the scientific challenges of the project is to design a low-cost and novel approach to create III-V layers with low density of defects by selective epitaxial lateral overgrowth on nanostructured buffer layers deposited onto commercial GaAs/Si substrates in order to minimize defect densities in III-V epilayers on GaAs/Si as an alternative to the state-of-the-art buffer layers. If this high-risk approach is demonstrated, the commercial implications would be very significant, as this would eliminate the need for expensive buffer layer deposition on top of Si prior to GaAs growth.
Partners: The research consortium is led by the Tyndall National Institute (Ireland) and comprises, IMDEA Materials Institute, Dublin City University and the Institute of Materials Science of Madrid (CSIC).
Funding Organisation: ERA-Net MATERA, European Union, 6th Framework Programme
Industrial Sector: Microelectronics
Project Period: 2009-2011
Principal Investigator: Dr. Jon Molina